Flexible Power Amplifiers Designing from Device to Circuit Level by Computational Load-Pull Simulation Technique in TCAD

Abstract

Matching network is major issue in broadband power amplifiers due to the fact that the transistor impedances are varying both with frequency and signal level. Thus it is difficult to match these impedances both at the input and output stages. The tunable matching networks are very demanding and desired for building flexible systems, but their accuracy depends on the transistor performance under the large signal operation. Computational load pull (CLP) simulation technique is a unique way to extract the impedances of power transistor at desired frequencies which make the design of matching network much easier for multiple bands power amplifiers. An LDMOS transistor is studied and its optimum impedances are extracted at 1, 2 and 2.5 GHz. Through optimum impedance, the tunable matching networks can be easily design for broadband amplifiers.