Flexible In–Ga–Zn–O-Based Circuits With Two and Three Metal Layers: Simulation and Fabrication Study

Abstract

The quest for high-performance flexible circuits call for scaling of the minimum feature size in thin-film transistors (TFTs). Although reduced channel lengths can guarantee an improvement in the electrical properties of the devices, proper design rules also play a crucial role to minimize parasitics when designing fast circuits. In this letter, systematic computer-aided design simulations have guided the fabrication of high-performance flexible operational amplifiers (opamps) and logic circuits based on indium–gallium–zinc-oxide TFTs. In particular, the performance improvements due to the use of an additional third metal layer for the interconnections have been estimated for the first time. Encouraged by the simulated enhancements resulting by the decreased parasitic resistances and capacitances, both TFTs and circuits have been realized on a free-standing 50- $\mu \text{m}$ -thick polymide foil using three metal layers. Despite the thicker layer stack, the TFTs have shown mechanical stability down to 5-mm bending radii. Moreover, the opamps and the logic circuits have yielded improved electrical performance with respect to the architecture with two metal layers: gain-bandwidth-product increased by 16.9%, for the first one, and propagation delay ( $t_{pd}$ ) decreased by 43%, for the latter one.