Abstract

A Flexible and Transparent charge trap Memory (FTM) based on a single-layer graphene (SLG) channel with a ITO gate electrode was fabricated on a flexible and transparent poly-ethylene naphtalate (PEN) substrate. Triple high-k dielectric stacks Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> -AlO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</sub> -Al <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sub> (AAA) were used as a data storage layer. The FTM shows memory characteristics with a memory window larger than 7V while maintaining ~80% of its transparency in the visible wavelength. The adoption of an AAA gate stack effectively suppressed the electron back injection from the gate electrode. This can be utilized for transparent and flexible electronics that require integration of logic, memory and display on a single flexible substrate with high transparency.

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