F-LEMMA

Abstract

Over the last two decades, as microprocessors have evolved to achieve higher computational performance, their power density also has increased at an accelerated rate. Improving energy efficiency and reducing power consumption is therefore of critical importance to modern computing systems. One effective technique to improve energy efficiency is dynamic voltage and frequency scaling (DVFS). In this paper, we propose F-LEMMA: a fast learning-based power management framework consisting of a global power allocator in userspace, a reinforcement learning-based power management scheme at the architecture level, and a swift controller at the digital circuit level. This hierarchical approach leverages computation at the system and architecture levels, and the short response times of the swift controllers, to achieve effective and rapid µs-level power management. Our experimental results demonstrate that F-LEMMA can achieve significant energy savings (35.2% on average) across a broad range of workload benchmarks. Compared with existing state-of-the-art DVFS-based power management strate gies that can only operate at millisecond timescales, F-LEMMA is able to provide notable (up to 11 %) Energy-Delay Product improvements when evaluated across benchmarks.