Abstract

Crystalline ZrTiO4 (ZTO) in orthorhombic phase with different plasma treatments was explored as the charge-trapping layer for low-voltage operation flash memory. For ZTO without any plasma treatment, even with a high k value of 45.2, it almost cannot store charges due the oxygen vacancies-induced shallow-level traps that make charges easy to tunnel back to Si substrate. With CF4 plasma treatment, charge storage is still not improved even though incorporated F atoms could introduce additional traps since the F atoms disappear during the subsequent thermal annealing. On the contrary, nevertheless the k value degrades to 40.8, N2O plasma-treated ZTO shows promising performance in terms of 5-V hysteresis memory window by ±7-V sweeping voltage, 2.8-V flatband voltage shift by programming at +7 V for 100 μs, negligible memory window degradation with 105 program/erase cycles and 81.8% charge retention after 104 sec at 125 °C. These desirable characteristics are ascribed not only to passivation of oxygen vacancies-related shallow-level traps but to introduction of a large amount of deep-level bulk charge traps which have been proven by confirming thermally excited process as the charge loss mechanism and identifying traps located at energy level beneath ZTO conduction band by 0.84 eV~1.03 eV.

Highlights

  • NAND flash memory devices have become one of the fastest growing segments of semiconductor memories because smartphones, hand-held gadgets and embedded applications all favor flash memory as a lightweight, fast, small and reliable alternative to disk storage

  • x-ray diffraction pattern (XRD) peak shift toward smaller angle has been reported in the literature when the cell volume increases[24] and it well explains the peak shift in this work since incorporating nitrogen ions to replace with lattice oxygen ions in ZTO will cause increase in cell volume, implying N2O plasma treatment introduces nitrogen into ZTO

  • High-k orthorhombic ZTO with various plasma treatments was explored as the charge-trapping layer for flash memory

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Summary

Introduction

NAND flash memory devices have become one of the fastest growing segments of semiconductor memories because smartphones, hand-held gadgets and embedded applications all favor flash memory as a lightweight, fast, small and reliable alternative to disk storage. The relatively thick tunnel oxide (6~7 nm) and inter-poly dielectric (10~13 nm) limit vertical down scaling, but lead to high program/erase voltage in the range of 17~19 V Due to these limitations, poly-Si has been replaced with Si3N4 which possesses discrete charge-trapping sites and is fundamentally more scalable as one moves to subsequent generations of 3D. To achieve a larger memory window at lower operation voltage, crystalline ZrTiO4 (ZTO) in orthorhombic phase with a high k value of 45.213 was adopted as the CTL in this work. It is worth noting that orthorhombic ZTO has been verified as a viable gate dielectric for aggressively scaled MOSFETs13 and is not a desirable candidate as the CTL due to less amount of charge-trapping sites To circumvent this issue, N2O or CF4 plasma treatment on ZTO was carried out to introduce charge traps while preserving the high k value of orthorhombic ZTO. The process is fully compatible with existent ULSI technology and paves the way to adopt a crystalline ZTO as the charge-trapping layer for future next-generation low-power flash memory

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