Firmware of the ATLAS Level-0 Endcap Muon Trigger for HL-LHC

Abstract

The design and the status of the development of the Level-0 endcap muon trigger firmware for the ATLAS experiment at the HL-LHC are presented. Reconstruction of muon candidates with an improved momentum resolution is achieved by exploiting all hit data from Thin Gap Chambers (TGCs) to be available at XCVU13P FPGA mounted on the trigger and readout boards. Track segments from muons are reconstructed by a pattern matching algorithm, where the TGC hits are compared with predefined hit patterns. Each predefined hit pattern has position and angle information for associated for the track segment. Implementation of the algorithm with minimal utilisation of the XCVU13P FPGA resource is a major challenge. We achieved resolutions with 1 cm in position and 4 mrad in angle, which satisfy the requirements, with less than 40% of the UltraRAM resources for full coverage of TGCs. The performance was evaluated with a post-synthesis simulation with hit inputs from Geant4 full simulation. The implementation was successful without timing violation, by optimising latch circuit locations. The results constitute an important ingredients in the development of the Level-0 endcap muon trigger firmware for HL-LHC.