Abstract
In this paper we present a conception of the finite impulse response (FIR) filter banks realized using the switched-capacitor (SC) rotator architecture. The illustrative filter bank has been designed and fabricated in the CMOS 0.35 /spl mu/m technology. Its main advantage is simplicity, as only few modifications of the initially designed single filter had been necessary in order to realize a QMF filter bank. These modifications changed neither the area of the filter layout nor its power consumption. The designed chip can operate in two modes easy to switch between them: a single filter with the programmable frequency response mode and a filter bank mode. Realization of these two modes in the same circuit has been possible, because switching between them encompasses merely the digital part of the control system and a subset of the clock signals.
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