Abstract

The junction temperatures of multiple chips in a press-pack IGBT device cannot be all measured directly. Finite element modeling is a powerful tool to investigate internal temperature distribution. In order to evaluate the performance of the press-pack structure, a computationally more efficient thermal network can be extracted to analyze coupled electro-thermal behavior under variable ambient and operating conditions. This paper describes an approach to derive such a thermal network model, based on superimposition using a series of FE modeling results. As a result, it is possible to establish a multiple input multiple output (MIMO) thermal network model, given the dimensions of a press-pack design and the material property. The paper illustrates the accuracy of the FE modeling approach using experiment on a single-chip device. In addition, this paper also proposes an improved Foster model of press-pack IGBT devices, taking into account the thermal coupling effect between chips. A relationship between the coupling thermal impedance and chip distance is established to simplify the calculation of some model parameters. The comparison between the thermal network model and FE model of a six-chip device under power cycling condition demonstrates the validity of the proposed model.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.