Fingerprinting methods for intellectual property protection using constraints in circuit partitioning

Abstract

The intellectual property (IP) reuse-based design model is vulnerable to misappropriation and fraud. The situation requires new IP protection mechanisms to guarantee the rights for both IP producers and IP users. In this study, the authors study the constraints used in circuit partitioning and hereby introduce two fingerprinting methods by cell perturbations. They evaluate the proposed methods on ISPD98 benchmark suits by the state-of-the-art partitioner hMetis and cell manipulation. By tuning the fingerprinting strategies, the performance of fingerprinted designs is well maintained. Experimental result shows that the overhead of fingerprinting methods is trivial. The relative Hamming distance of cell fixing method is high, which indicates the method could yield distinct fingerprinting solutions. The relative Hamming distance of cell exchange method is low which is due to the low percentage of cell being fixed.