FinFET Technology: Modeling and RF Characterization for 5nm Node Technology: A Review

Abstract

The study offers new methods for understanding and simulating the radiofrequency, analog, and thermal characteristics of the FinFET at the 5nm CMOS technology node. The results of the thermal assessment show that changes in temperature have an effect on the threshold voltage and sub-threshold slope (SS). The maximum oscillation frequency and cut-off frequency of an n-FinFET RF device with a single gate contact are revealed by the RF investigation. Additionally, the study provides information about the device-level temperature sensitivity of the analog and RF Figures of Merit (FoMs) for the 5nm technology. The industry-standard BSIM-CMG model is adjusted to include the effects of self-heating (SH) and parasites in order to improve model accuracy. The updated BSIM-CMG model increases accuracy by taking self-heating and parasite effects into account. Effective heat pathways for lowering junction temperature are found by employing vias on silicon and stacks of conductive materials made of metal. It should be remembered, though, that using these heat pathways could raise parasitic capacitance and negatively impact the circuit's functionality. Keywords: RF Characterization, Thermal Impact, Self-Heating, Figure of Merit, FinFET, Analog Characteristics.