FinFET and reliability considerations of next-generation processors

Abstract

Recent experimental studies reveal that Fin field-effect-transistor (FinFET) devices commercialized in recent years tend to suffer from more severe negative bias temperature instability (NBTI) degradation compared to planar transistors, necessitating effective techniques on processors built with FinFET for endurable operations. We propose to address this problem by exploiting the device heterogeneity and leveraging the slower NBTI aging rate manifested on the planar devices. We focus on modern graphics processing units in this study due to their wide usage in the current community. We validate the effectiveness of the technique by applying it to the warp scheduler and L2 cache, and demonstrate that NBTI degradation is considerably alleviated with slight performance overhead.