Abstract

Stealth dicing is widely utilized in wafer manufacturing due to its excellent advantages, such as debris-free and narrow kerf width, over the conventional process dicing method. Aberration compensation is the key technology for achieving high quality and efficiency in stealth dicing. A fine optimization of aberration compensation method is proposed here to enhance the energy intensity near the focusing point inside a silicon wafer. This method takes into account not only the impact of the total number of flyback regions on focusing, but also their distribution on the SLM. Instead of relying on minimum peak-to-valley value, it employs the focus intensity reduction value to quantify the impact of flyback regions. To demonstrate this method, simulations of intensity distribution in silicon wafer were performed along with an experiment to evaluate dicing performance using crack propagation. After employing our correcting method, the maximum crack propagation increased to 58.7 μm and resulted in a 38.4 % improvement in dicing performance compared to the conventional correcting method.

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