Abstract
The Tatung fine grain scheduler (TFGS), which works on machine instruction level for multiprocessor systems, is described. The object of TFGS is to minimise the total execution time of an application program that is to be executed on a shared memory multiprocessor system. An application program is compiled to generate intermediate code. This code is then represented by a data/control dependence graph, a branch nest tree and a priority list. The data dependence between operations, the pipeline effect of each processing element, and branches in the application programs are considered when TFGS does the scheduling task. The multiprocessor system is assumed to be interconnected by a shared memory. The hardware support of shared memory is designed. To process branches and loops within the application program, a status recording mechanism is proposed. The hardware has been designed and simulated. TFGS has been implemented, and some application programs have been used as the testing inputs. The results are very encouraging.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
More From: IEE Proceedings - Computers and Digital Techniques
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.