Fin Aspect Ratio Optimization of Novel Junctionless Gate Stack Gate All Around (GS-GAA) FinFET for Analog/RF Applications

Abstract

This paper studies the effect of Fin aspect ratio (AR) variation with constant conducting channel area on analog/RF performance of novel Junctionless Gate Stack Gate All Around (GS-GAA) FinFET. Several important electrostatic, analog, and RF parameters have been explored with the help of the SILVACO ATLAS 3D simulator. A reduction in leakage current (Ioff) and subthreshold swing (SS) has been observed for the high Fin aspect ratio. The Ioff of the device reduces by almost 20 times and consequently improves the switching speed and subthreshold characteristics of the device. Parameters like transconductance (gm), device efficiency (TGF), cutoff frequency (fT), and maximum oscillation frequency (fmax) also show notable improvement for the higher Fin aspect ratio. Thus, a high Fin aspect ratio improves the performance of the device and also provides better immunity to short-channel effects. The findings of this paper can help engineers to design 3D devices according to their needs.