Abstract
We study the mechanism of filamentation in resistive switching (RS) memory from an electrical perspective using a conventional metal-insulator-semiconductor (MIS) high-κ metal gate transistor test structure and propose the possibility of using the same transistor structure for both logic and RS memory applications. The filament location is measured after every SET transition, and our investigations point to a “pseudorandom” nature of filament nucleation. Migration of highly diffusive nickel from source/drain silicide contacts toward the active silicon channel region transforms the existing MIS stack to MIM, thereby enabling the RS phenomenon.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.