Field-plate technique for high power compound semiconductor devices applications

Abstract

The field-plate (FP) technique for GaAs-based pseudomorphic high electron mobility transistors (pHEMTs) was discussed with various FP voltage, metal connection, and breakdown mechanism. In addition, these mechanisms of devices were also evaluated experimentally by their microwave and power performance. For breakdown voltage mechanism investigation, the design of experiment (DOE) with 16 transistors was adopted, the FP length extension exhibited a high efficiency to improve off-state breakdown voltage (BV <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">off</inf> ) due its high suppression ability to thermionic-field emission (TFE) of gate electrons. However, FP induced depletion region is difficult to suppress channel impact-ionization mechanism which dominated the on-state breakdown voltage (BV <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</inf> ). In addition, FP length extension is beneficial for improving device flicker noise caused by surface states and GR width extension shows an opposite trend because un-cap Schottky layer exposure area is also increased with longer GR width extension.