Abstract

A novel fabrication technique for submicrometer trench isolation is proposed. This features a phosphorus-doped polysilicon field shield filled into the trench and a thick isolation oxide formed on polysilicon by impurity-enhanced oxidation (IEO). Due to the oxide entirely covering the trench shoulder by a self-aligned process, the proposed structure has notable merits: (i) the anomalous hump current in Id-Vg subthreshold characteristics is suppressed even in a narrow-channel transistor and (ii) the proposed structure provides less susceptibility to crystal defect generation. These can facilitate fabrication of controllable devices. In addition, a deeply implanted channel stopper yields a low parasitic capacitance for fast device operation and excellent isolation performance characteristics such as low field penetration and low punch-through current. These are attributed to the effect of the electric field shield.

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