Few-layer molybdenum disulfide transistors and circuits for high-speed flexible electronics

Over a decade, two-dimensional (2D) van der Waals crystal materials have been intensively studied in the electronic device community for their attractive physics and various electronic applications such as the Internet-of-Things (IoTs) and wearable electronics. Particularly, their robust mechanical properties with the intrinsic strain limit of ~20% and wide range of saturation velocity of ~108 cm/s facilitate the future flexible nanoelectronics. Graphene, the first pioneering 2D material, is believed to be promising for high frequency flexible applications due to its high mobility and flexibility. However, its semi-metallic band structure limits graphene in digital applications that require the evident current On/Off ratio. On the other hand, the Molybdenum disulfide (MoS2), which has sizable bandgap of 1.3 ~1.9 eV, has been demonstrated for high current On/Off ratio over 108, which indicates its promising digital/logic systems wth low power operation. However, its high frequency digital applications are limited by its low mobility and n-type unipolar transport. The black phosphorus has been intensively studied due to its sizable bandgap ranging from 0.3 to 2 eV and high carrier mobility reaching to 1000 cm2/Vs, which can facilitate the development of high frequency digital applications. In this work, we demonstrate the high frequency operation of flexible 2D materials-based transistors. Graphene transistors on flexible willow glass substrate shows outstanding 95 GHz intrinsic cut-off frequency, and its calculated saturation velocity is ~8.4 ×106 cm/s, which is the highest for any flexible transistor on any material system. RF measurement of MoS2 transistors with the 500 nm channel length on flexible polyimide substrate shows 5.6 GHz intrinsic cut-off frequency and 3.3 GHz power gain. Multilayered BP field-effect transistor with 500 nm channel length shows 17.5 GHz and 14.5 GHz for intrinsic cut-off frequency and power gain, respectively. All of these studies for 2D materials-based transistors on flexible substrates clearly represents the state-of-the-art progress of the GHz operation of flexible transistors as well as wide GHz range of frequency operations, which pave the path toward wireless communication flexible applications and IoTs. In addition, paper substrates have been investigated for future electronics due to its cost-effective, eco-friendly and flexible features. With polyimide coating layer on commercially available paper substrates, we could make wet-processable paper substrate with low surface roughness for short channel length fabrication. We represent CVD graphene and MoS2 transistors on paper substrate, which shows the first GHz FETs operation on paper substrates.

High performance thin film electronics based on inorganic nanostructures and composites

Few-layered molybdenum disulfide (MoS2) has demonstrated promising advantages for the integration of next-generation electronic devices. A vertical short-channel MoS2 transistor with a channel length of sub-10 nm can be realized using mica as the insulated mesa and MoS2 flake dry-transferred onto the mica as the channel. A near-perfect symmetrical and fully saturated output characteristic can be obtained for the positive or negative drain-source voltage. This result is attributed to an effective transformation of the drain-source electrode contact from Schottky contact to Ohmic contact via forming gas annealing. The vertical-channel MoS2 transistor with a channel length of 8.7 nm exhibits excellent electrical characteristics, for example, a negligible hysteresis voltage of 60 mV, an extraordinarily small subthreshold swing of 73 mV/dec, a considerably weakened drain-induced barrier-lowering effect (100 mV/V), and the first-reported intrinsic delay time of 2.85 ps. Moreover, a logic inverter can be realized using the two vertical-channel MoS2 transistors, with a high voltage gain of 33. Experimental results indicate that the developed method is a potential approach for fabricating MoS2 transistors with an ultrashort channel and high performance, and consequently, manufacturing MoS2-based integrated circuits.

Monolayer MoS2 and WSe2 Double Gate Field Effect Transistor as Super Nernst pH sensor and Nanobiosensor

Two-dimensional layered materials, such as molybdenum disulfide, are emerging as an exciting material system for future electronics due to their unique electronic properties and atomically thin geometry. In this work, MoS2-based FETs are fabricated using mechanical cleavage and standard photolithographic and metal evaporation techniques, and the detector exhibits a good ohmic contact. We show that the multilayer molybdenum disulfide photodetector has a fast photoresponse as short as 42 μs. The fast photodetector response is due to the decrease in the trap states in MoS2 flakes compared to monolayer MoS2, making its photoresponse time close to its intrinsic response. The large photocurrent with the responsivity and external quantum efficiency of 59 A/W and 13 800% for the wavelength of 532 nm was also measured. The fast response time, high responsivity, and the ease of fabrication of these devices make them important components for future optoelectronic devices.

Two-dimensional (2D) transition-metal dichalcogenides (TMDs) materials, such as molybdenum disulfide (MoS2), stand out due to their atomically thin layered structure and exceptional electrical properties. Consequently, they could potentially become one of the main materials for future integrated high-performance logic circuits. However, the local back-gate-based MoS2 transistors on a silicon substrate can lead to the degradation of electrical characteristics. This degradation is caused by the abnormal effect of gate sidewalls, leading to non-uniform field controllability. Therefore, the buried-gate-based MoS2 transistors where the gate electrodes are embedded into the silicon substrate are fabricated. The several device parameters such as field-effect mobility, on/off current ratio, and breakdown voltage of gate dielectric are dramatically enhanced by field-effect mobility (from 0.166 to 1.08 cm2/V·s), on/off current ratio (from 4.90 × 105 to 1.52 × 107), and breakdown voltage (from 15.73 to 27.48 V) compared with a local back-gate-based MoS2 transistor, respectively. Integrated logic circuits, including inverters, NAND, NOR, AND, and OR gates, were successfully fabricated by 2-inch wafer-scale through the integration of a buried-gate MoS2 transistor array.

Two-dimensional (2D) semiconductors have attracted significant interest in the last decade for applications in high speed and low power consumption nano electronics. Their intrinsic thickness scalability down to atomic layer and superior mechanical stiffness enabled novel applications in flexible nanosystems[1]. Black phosphorus (BP) captured immediate attention in electronics community owing to its superior electrical performance including high carrier mobility >1000 cm2/Vs, highly tunable energy band gap ranging from 0.3 eV (bulk) to 2 eV (monolayer), and its unique anisotropy in electrical, thermal and mechanical properties[2, 3]. In this work, we demonstrate few layer BP based flexible nano electronics for robust RF applications with intrinsic cut-off frequency of 20 GHz[4]. Ambipolar inverter based on BP transistors was demonstrated with high inverter gain of 66. Flexible dual-finger configurated top-gated (TG) BP RF transistors (Fig. 1(a)) were fabricated on top of highly bendable polyimide substrate. The DC transfer and output characteristics for a typical transistor with channel length L=0.5 μm were shown in Fig. 1(b) and (c), with carrier mobility ∼233 cm2/Vs obtained. The intrinsic RF response was obtained after standard open-short de-embedding. As shown in Fig. 1(d) intrinsic cutoff frequency f T =20 GHz was obtained, which was the highest value obtained for the flexible BP transistors. Superior mechanical robustness of the reported flexible BP RF transistors was verified via bending test under tensile strain up to 1.5%, with less than 25% of degradation observed for extrinsic cutoff frequency f t (Fig. 1(e))[4]. Compare with graphene, MoS 2 and inorganic metal oxide thin films, few layer BP based RF transistors successfully extended the application scenario such as wireless transceiver and smart gadgets where the operation frequency lies in tens of GHz (Fig. 1(f))[4]. Based on the ambipolar transport characteristics of few layer BP transistors, ambipolar inverter was successfully realized as the schematic shown in Fig. 2(a). Two ambipolar BP bottom gated transistor were configurated into a complementary C-MOS structure, where the charge neutral point of the two series transistors split by the applied power supply voltage. The inverter functionality with sharp inversion of the output voltage signal with respect to input signal as shown in Fig. 2(b). The peak inverter gain was reaching ∼66 under V dd =5V (Fig. 2(c)). This value is much higher than the previously reported BP invertors[5] and makes this material promising for high speed logic applications.

Current analytical expressions for intrinsic base resistance and cutoff frequency of bipolar transistors based on an independent charge/current model do not provide accurate results at high injection. In this paper, explicit analytical expressions for intrinsic base resistance and cutoff frequency using an improved charge/current model incorporating base widening at high injection for bipolar transistors are presented. Compared to fully numerical simulation results, the improved model provides much more accurate expressions for intrinsic base resistance and cutoff frequency of bipolar transistors at high injection. Key words: base resistancecut‐off frequencyhigh injection Notes Correspondence addressee

Explicit analytical expressions for intrinsic base resistance and cutoff frequency of bipolar transistors biased at high injection

Transition metal dichalcogenide MoS2 field-effect transistors for analog circuits: A simulation study

The operation of an integrated two-dimensional complementary metal–oxide–semiconductor inverter with well-matched input/output voltages is reported. The circuit combines a few-layer MoS2 n-MOSFET and a black phosphorus (BP) p-MOSFET fabricated using a common local backgate electrode with thin (20 nm) HfO2 gate dielectric. The constituent devices have linear threshold voltages of −0.8 V and +0.8 V and produce peak transconductances of 16 μS μm−1 and 41 μS μm−1 for the MoS2 n-MOSFET and BP p-MOSFET, respectively. The inverter shows a voltage gain of 3.5 at a supply voltage, VDD = 2.5 V, and has peak switching current of 108 μA and off-state current of 8.4 μA (2.4 μA) at VIN = 0 (VIN = 2.5 V). In addition, the inverter has voltage gain greater than unity for VDD ≥ 0.5 V, has open butterfly curves for VDD ≥ 1 V, and achieves static noise margin over 500 mV at VDD = 2.5 V. The voltage gain was found to be insensitive to temperature between 270 and 340 K, and AC large and small-signal operation was demonstrated at frequencies up to 100 kHz. The demonstration of a complementary 2D inverter which operates in a symmetric voltage window suitable for driving a subsequent logic stage is a significant step forward in developing practical applications for devices based upon 2D materials.

We have achieved 140-nm channel length graphene thin-film transistors (TFTs) on flexible glass with a 95-GHz intrinsic cutoff frequency and greater than 30-GHz intrinsic power frequency after standard de-embedding. The flexible glass substrate offers subnanometer surface smoothness as well as high thermal conductivity, 1 W/ $\textrm {m}\,\cdot \, \textrm {K}$ , which can prevent thermomechanical failure, which is a limitation of plastic and rubber substrates. In addition, we developed a flexible 60-nm polyimide thin film as gate dielectric with low surface roughness less than 0.35 nm for optimal carrier transport and facilitate edge-injection contacts for low contact resistance. The maximum electron (hole) mobility is 4540 (1100) cm2/ $\textrm {V}\cdot \textrm {s}$ , and the extracted contact resistance in the electron (hole) branch is 1140 (720) $\Omega \cdot \mu \text{m}$ . The intrinsic cutoff frequency is 196% higher than our previous results on polymeric substrates. Importantly, the experimental saturation velocity of the graphene TFT is the highest for any flexible transistor on any material system reported so far.

Molybdenum disulfide (MoS2) has attracted great attention from researchers because of its large band gap, good mechanical toughness and stable physical properties; it has become the ideal material for the next-generation optoelectronic devices. However, the large Schottky barrier height (ΦB) and contact resistance are obstacles hampering the fabrication of high-power MoS2 transistors. The electronic transport characteristics of MoS2 transistors with two different contact structures are investigated in detail, including a copper (Cu) metal–MoS2 channel and copper (Cu) metal–TiO2-MoS2 channel. Contact optimization is conducted by adjusting the thickness of the TiO2 interlayer between the metal and MoS2. The metal-interlayer-semiconductor (MIS) structure with a 1.5 nm thick TiO2 layer has a smaller Schottky barrier of 22 meV. The results provide insights into the engineering of MIS contacts and interfaces to improve transistor characteristics.

A numerical simulation based on self-consistent solution of non-equilibrium Green's function (NEGF) formulism and Poisson equation has been developed in order to investigate the width-dependent characteristics of GNR FETs in two GNR families (3p,0) and (3p+1,0). On-state characteristics such as transfer characteristics, transconductance, gate capacitance, intrinsic cut-off frequency and intrinsic gate-delay time have been studied. We found that while the maximum intrinsic cut-off frequency of both GNR families are increased by increasing the GNR width, GNR(3p,0) shows superior performance such as more than twice larger intrinsic cut-off frequency at lower gate voltages, higher drive current and lower intrinsic gate-delay time, indicating GNR(3p,0) a more preferable attribute than GNR(3p+1,0) for high frequency applications.

The effect of phonon scattering on the intrinsic delay and cutoff frequency of Schottky-barrier carbon nanotube (CNT) FETs (CNTFETs) is examined. Carriers are mostly scattered by optical and zone-boundary phonons beyond the beginning of the channel. It is shown that the scattering has a small direct effect on the dc on current of the CNTFET, but it results in a significant decrease of intrinsic cutoff frequency and increase of intrinsic delay.