Abstract
ABSTRACT Ferroelectric high-density memories (> 64 Mb) using the integrated cells of size less than 0.l um2 will be more increased in upcoming ubiquitous era. Thus in this report we suggest fabrication of 3D nanotube capacitors for high-density semiconductor memories. Herein we discuss preparation of Pt and BLT nanotubes as an initial step toward 3D nanotube capacitors. We have used simple and convenient method, wetting of pore walls of porous templates. Templates could be either macroporous Si or nanoporous alumina. In future, characteristics of Pt and BLT nanotubes by PFM and TEM will be performed in order to make next steps toward 3D nanotube capacitors.
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