Abstract
Ferroelectric memory is expected not only for a standard memory but also for embedded memories in logic LSIs such as smart cards and microcomputers, because it's electrical characteristics and process compatibility are adequate for embedded. For embedded devices, a high speed operation and a reduction in memory cell area are required. In order to apply the ferroelectric memory to the embedded devices widely, a multi level metallization (for high speed operation), a stacked capacitor cell (for reduction the cell area) and other techniques are necessary. In this paper, our approach for the ferroelectric embedded device will be presented.
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