Abstract
Improvements in storage systems using currently available square-loop ferrite cores are considered. These enable the normal cycle time of 6–10 microsec to be reduced to less than 2 microsec. Effort has been concentrated on the word-selected two-core-per-digit arrangement, and the most promising techniques are those which involve partial-flux switching. A system is developed suitable for a store of 1024 words of 52 digits with a cycle time of about 1.6 microsec. In a smaller store of, say, 100 words, a cycle time of approximately 0.6 microsec is feasible.
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