Feedback Biasing in Nanoscale CMOS Technologies

Abstract

<para xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> This work rediscovers the attractiveness of feedback biasing when applied to circuits designed in nanoscale CMOS technologies. It is shown that very compact amplifiers can be obtained by utilizing a type of biasing that imposes minimal area overhead. We discuss how the undesired features of the nanoscale CMOS technologies actually help in the revival of this simple biasing method in newer technology generations. The measurement results of prototyped common-source (CS) amplifiers utilizing feedback biasing for application in medical ultrasound imaging systems are presented in this brief. The proposed feedback biasing is also suitable for amplifying signals from high-impedance sources that pose challenges on maintaining high input impedance for the voltage amplifiers while maintaining a very low input capacitance value. Measurements show that the proposed amplifier achieves a voltage gain of 28 dB, an output noise power spectral density of 0.11 <formula formulatype="inline"><tex Notation="TeX">$(\mu\hbox{V})^{2}/ \hbox{Hz}$</tex></formula> at center-frequency, and a total harmonic distortion of <formula formulatype="inline"> <tex Notation="TeX">$-$</tex></formula>30 dB, with the full-scale output at 30 MHz, while drawing 120 <formula formulatype="inline"> <tex Notation="TeX">$\mu\hbox{A}$</tex></formula> from a 1-V power supply. The amplifiers were fabricated in 90-nm CMOS technology and measured to be just <formula formulatype="inline"><tex Notation="TeX">$20\ \mu\hbox{m} \times 10\ \mu\hbox{m}$</tex></formula>. </para>