FEATURES OF FORMATION OF BIPOLAR TRANSISTOR FOR IС WITH DIELECTRIC ISOLATION OF ELEMENTS

Abstract

The processes of a selective epitaxy of silicon layers on the structures Si-SiO2-Si*, formation of dielectric isolation and diffusive areas of complementary bipolar transistor structures are optimized in the work. Complete dielectric isolation of elements IC in episilicon is reached at the expense technology of the structures Si- SiO2-Si* association with the LOCOS technology. Oxidation of the border between layers epimono-Si and epi-Si* is formatted of complete dielectric isolation of elements IC. In this case the border is located at an angle 55° to the surface. In this case the gradient of mechanical tension is directed either to regional area of volume epimono-Si or to layer volume epi-Si * and appearance of mechanical tension, sufficient for emergence of defects in a layer epimono-Si doesn’t happen. Processes of emitter-region diffusion are optimized, which increased the factor of injection of p-n-p-transistors and improved similarity of characteristics of complementary transistors. Epitaxy layers being 3,0–4,0 mcm thick, breakdown tension Uce ≥ 20 V and β ≥ 60 .