Abstract
We have previously reported on the successful deposition of heterojunction solar cells whose thin intrinsic crystalline absorber layer is grown using the standard radio frequency plasma enhanced chemical vapour deposition process at 165 °C on highly doped P-type (100) crystalline silicon substrates. The structure had an N-doped hydrogenated amorphous silicon emitter deposited on top of the intrinsic epitaxial silicon layer. However to form the basis of a solar cell, the epitaxial silicon film must be chiefly responsible for the photo-generated current of the structure and not the underlying crystalline silicon substrate. In this article we use detailed electrical-optical modelling to calculate the minimum thickness of the epitaxial silicon layer for this to happen. We have also investigated by modelling the influence of the a-Si:H/epitaxial-Si and epitaxial-Si/c-Si interface defects, the thickness of the epitaxial silicon layer and its volume defect density on cell performance. Finally by varying the input parameters and considering various light-trapping schemes, we show that it is possible to attain a conversion efficiency in excess of 13% using only a 5 micron thick epitaxial silicon layer.
Highlights
The rapid growth of the photovoltaic industry and the resultant shortage of silicon feedstock supply in the last decade, prompted interest in thin crystalline wafers obtained either by thinning down thick ones or by developing epitaxial growth processes
Petermann et al [4] demonstrated that it is possible to attain ∼19% efficiency in heterojunction solar cells with only a 43 micron thick intrinsic epitaxial silicon layer. All these approaches involve temperature processes in excess of 600 ◦C, which limits the range of suitable substrates and often require post-hydrogenation to passivate the defects in the epitaxial silicon layer
The defect densities at different points of the structure were extracted in the following way: In order to fix the defect density at the I-epitaxial silicon (epi-Si)/P+-c-Si interface in the 2.4 μm epi-Si layer cell, it was noted that a value of Nss, back 7×1011 cm−2, leads to a higher Voc but a lower fill factor (FF) than the experimental case
Summary
The rapid growth of the photovoltaic industry and the resultant shortage of silicon feedstock supply in the last decade, prompted interest in thin crystalline wafers obtained either by thinning down thick ones or by developing epitaxial growth processes. Current is coming from the underlying P++-c-Si substrate, nor has the minimum thickness of the epi-Si layer been determined, so that the major current contribution comes from it This knowledge is of utmost importance, since our final aim is to achieve a lift-off from the c-Si wafer allowing for the re-use of the latter. In order to answer the above questions and in general to study the feasibility of using such thin crystalline silicon films epitaxially grown at 165 ◦C in solar cells, we have simulated the deposited solar cells using the one dimensional detailed electrical-optical model “amorphous semiconductor device modelling program (ASDMP) [8, 9]”, to determine the fraction of the total photo-current coming from the epi-Si layer. Using the optical model built into ASDMP, we try to predict the maximum efficiency achievable in such structures for a practical thickness of 5 μm for the absorber epi-Si layer
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