Abstract
Three-dimensional (3D) integration of coaxial through silicon vias (TSVs) is becoming an area of considerable interest owing to their superior high-frequency performance in comparison to standard 3D interconnects. However, in contrast to standard TSVs, coaxial TSVs require more processing to integrate the ground shield surrounding the copper via. Cost-effective methods for implementing coaxial TSV technology with CMOS processing are challenging. Demonstrated is a low-cost fabrication method for integrating coaxial TSVs within the confines of a standard CMOS process is demonstrated.
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