Abstract

With the growth of the nano-satellites market, the usage of commercial off-the-shelf FPGAs for payload applications is also increasing. Due to the fact that these commercial devices are not radiation-tolerant, it is necessary to enhance them with fault mitigation mechanisms against Single Event Upsets (SEU). Several mechanisms such as memory scrubbing, triple modular redundancy (TMR) and Dynamic and Partial Reconfiguration (DPR), can help to detect, isolate and recover from SEU faults. In this paper, we introduce a dynamically reconfigurable platform equipped with configuration memory scrubbing and TMR mechanisms. We study their impacts when combined with DPR, providing three different execution modes: low-power, safe and high-performance mode. The fault detection mechanism permits the system to measure the radiation level and to estimate the risk of future faults. This enables the possibility of dynamically selecting the appropriate execution mode in order to adopt the best trade-off between performance and reliability. The relevance of the platform is demonstrated in a nano-satellite cryptographic application running on a Zynq UltraScale+ MPSoC device. A fault injection campaign has been performed to evaluate the impact of faulty configuration bits and to assess the efficiency of the proposed mitigation and the overall system reliability.

Highlights

  • Nano-satellites have been recently under the spotlight due to their versatility in many different applications

  • Powerful computational resources are provided by FPGA devices which are being increasingly embedded in nano-satellites, in radiation-hardened FPGA and in commercial off-the-shelf devices

  • In Safe mode, the resource usage overhead compared to the High-Performance mode will be high, but these modules have the significant advantage of being implemented in hardware [18]

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Summary

Introduction

Nano-satellites have been recently under the spotlight due to their versatility in many different applications. That nano-satellite can be equipped with a significant amount of computational resources, they offer a costefficient way to carry out several applications from diverse market verticals and a faster go-to-market. Powerful computational resources are provided by FPGA devices which are being increasingly embedded in nano-satellites, in radiation-hardened FPGA and in commercial off-the-shelf devices. They provide high performance, reasonable power consumption and good flexibility. These qualities allow them to be advantageously embedded as a payload board in a nano-satellite system. Payload boards often include specific devices such as sensors or cameras, requiring the execution of dedicated computation tasks like image and signal processing, data mining or sensors fusion

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