Fault tree analysis on kinematic accuracy of wafer stage using BDD and DFTA technique

Abstract

Based on the structure and operation mechanism of the dual-stage lithographic system, fault tree analysis for the key subsystem, wafer stage, is performed. Since the system is very complexity, the BDD (binary decision diagram) and DFTA (dynamic fault tree analysis) technique are introduced to make up the disadvantages of the traditional static FTA (fault tree analysis) method. Event “The kinematic accuracy of wafer stage can't meet the goal” is installed as the top event of the fault tree. Central factors affecting the kinematic accuracy of the wafer stage is identified through the study.