Abstract

Fault tolerant routing has been investigated to overcome the failure encountered during routing in Very large scale integrated circuits (VLSI). In recent years, researchers have proposed the use of Hyper-de Bruijn graph as a physical topology for VLSI. In this paper, we proposed a new approach to provide fault tolerant routing which hasn't been investigated on Hyper-de Bruijn network. The proposed approach is based on multi level discrete set concept in order to find a fault free shortest path among several paths provided. We also prove our fault tolerant routing algorithm to have the best performance among fault tolerant routing algorithms in Hyper-de Bruijn network.

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.