Fault-Tolerant Decoders for Cyclic Error-Correcting Codes

Abstract

High-speed cyclic code decoders, which are central to modern communication systems, when implemented in dense very large scale integration (VLSI), are susceptible to pernicious momentary internal soft fails presenting a demanding error-control challenge. However, special structures inherent in such decoders offer new methods for incorporating distributed error control throughout their designs. The underlying design principles and motivations are emphasized providing a variety of options to meet various requirements. Bose-Chaudhuri-Hocquenghem (BCH) codes are used to exemplify the new techniques as applied to the usual three standard subsystems present in a decoder. The first and last parts, syndrome calculations and transform inversion, both involve finite field transforms suggesting the effective application of fast transform algorithms. Error control features are based upon the chord properties of the transform coefficients including even fast algorithms. The third subsystem, the Berlekamp-Massey algorithm, can be protected through a chord recursion property affiliated with the error location connection polynomial. The propagation and spread of internal errors are studied and a special sink register compares several quantities, available in close proximity, to their easily recomputed counterparts. Most of these results are applicable to generalized to decoders for codes over higher ordered alphabets such as Reed-Solomon codes.