Abstract
In this paper, the selection of fault tolerance limits and input stimulus using an implemented adaptive FPGA-based testing system based on a method utilizing wavelet transformation of the current waveforms is presented. The testing scheme is innovative because it offers the ability of applying different input stimulus signals with respect to the requirements of the examined circuit. Moreover, the method used is simple, offers a single-point test measurement solution and may easily be adapted to test various other analog and mixed-signal systems. Experimental results are presented showing the advantages of the proposed testing scheme.
Highlights
Testing of analog and mixed-signal circuits has been an active research topic
Comparison of fault detectability tolerance limit using an adaptive FPGA-based testing system which relies on a method incorporating wavelet transformation of current waveforms is presented
The implemented testing scheme offers the ability of dynamically applying different input stimulus signals and computing the fault detectabilities using different tolerance limit values with respect to the requirements of the examined circuit
Summary
Due to their simplicity and ease of application to a circuit under test (CUT), no matter how complex it is, have been investigated for several years and various approaches have emerged [1]-[4]. Methods based on the use of the wavelet transform, which resolves a signal in both time and frequency simultaneously [5]-[7], give an approximation of a transient current waveform for a certain frequency of the signal. The application of a fault detection method, based on the energy metric of the wavelet transform of the measured current waveforms of circuits (like the power supply current IPS or the output current IL), is used for the selection of input stimulus and fault tolerance limits. (2014) Fault Tolerance Limits and Input Stimulus Selection Using an Implemented FPGA-Based Testing System.
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