Fault-tolerance in a multiprocessor, digital switching system

Abstract

Since the introduction of computer-controlled telephone switching systems, fault-tolerance requirements have been described in terms such as ``no more than two hours downtime in 40 years'', and ``no more than 2 calls in 10 000 lost by the system.'' As microprocessors, pulse code modulation (PCM) and multiprocessing have been added to switching systems, system architects have had to rethink system implementations in striving to meet these goals. This paper describes how the challenge is being met in a family of field-proven, multiprocessor-controlled PCM switching systems.