Fault Modeling on Complex Plane and Tolerance Handling Methods for Analog Circuits

Abstract

Due to the lack of a feasible fault modeling method, soft fault diagnosis and tolerance are two challenging problems in analog circuit fault diagnosis. This paper proposes approaches to solve these two problems. First, a new fault modeling method and its theoretical proof are presented. In analog circuits, either the real part (“Ur”) or the imaginary part (“Ui”) of output voltage is the function of fault component parameter “ z,” viz., Ur=f1(z) and Ui=f2(z). By eliminating “ z,” equation F(Ur,Ui)=0 is achieved, where function “ F()” is independent from the value of “ z” and uniquely determined by the location of “ z” and the other fault free component in the circuit under test (CUT). Hence, the function “ F()” can be used as the fault model, which is applicable to both hard (open or short) and soft (parametric) faults. It is also applicable to either linear or nonlinear analog circuits. On a complex plane, the equation “ F(Ur, Ui)=0” represents a curve which is determined by the fault free output voltage and the shape of “ F().” Then, the parameter tolerance is taken into consideration. The tolerance influences the fault diagnosis by shifting the fault free output voltage and distorting the shape of “ F().” These influences can be mitigated in two ways: 1) The free output voltage is measured when an actual circuit is under steady state and free of fault, and 2) the minimal distance approach is used to find the fault component. The effectiveness of the proposed approaches is verified by both simulated and experimental results.