Abstract
This paper proposes a microdiagnostic procedure for efficient fault diagnosis of bit-slice processors that are formed by an array of identical bit-slice processors. A test generation procedure for testing the entire array simultaneously instead of testing single slice, one after another, is presented, which is based on the high functional fault model and restricted multiple slice fault assumption within an array. Fault detection and fault location procedures using the generated test sequence are also presented. Using these procedures, a test microprogram and diagnostic system for the bit-sliced processor constructed by the array of four Am 2901 bit-slices are developed.
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