Fast Pedestrian Detection for Intelligent Vehicle Based on FPGA and Monocular Vision

Abstract

This paper presents a fast pedestrian detection algorithm for intelligent vehicle based on FPGA architecture, using AdaBoost algorithm and Haar features. We describe the hardware design including image scaling, integral image generation, pipelined processing as well as classifier, and parallel processing multiple classifiers to accelerate the computational speed of the pedestrian detection system. The proposed architecture for pedestrian detection has been tested using Verilog HDL and implemented in Xilinx Virtex-5 FPGA. Its performance has been measured about 38 times than the equivalent software implementation.