Abstract

Non-charge-based logic devices are promising candidates for the replacement of conventional complementary metal-oxide semiconductors (CMOS) devices. These devices utilize magnetic properties to store or process information making them power efficient. Traditionally, to fully characterize the input-output behavior of these devices a large number of micromagnetic simulations are required, which makes the process computationally expensive. Machine learning techniques have been shown to dramatically decrease the computational requirements of many complex problems. We use state-of-the-art data-efficient machine learning techniques to expedite the characterization of their behavior. Several intelligent sampling strategies are combined with machine learning (binary and multi-class) classification models. These techniques are applied to a magnetic logic device that utilizes direct exchange interaction between two distinct regions containing a bistable canted magnetization configuration. Three classifiers were developed with various adaptive sampling techniques in order to capture the input-output behavior of this device. By adopting an adaptive sampling strategy, it is shown that prediction accuracy can approach that of full grid sampling while using only a small training set of micromagnetic simulations. Comparing model predictions to a grid-based approach on two separate cases, the best performing machine learning model accurately predicts 99.92% of the dense test grid while utilizing only 2.36% of the training data respectively.

Highlights

  • The scaling of conventional complementary metal-oxide semiconductors (CMOS) is reaching its limit [1] in accordance with Moore’s prediction [2], introducing limitations and challenges to the semiconductor industry

  • This paper evaluates the performance of the Explicit Design Space Decomposition (EDSD), Neighborhood-Voronoi (NV), Probability of Feasibility (PoF), and Entropy [18,22,23,24] sampling strategies

  • The corresponding labels are obtained by micromagnetic simulations using OOMMF

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Summary

Introduction

The scaling of conventional complementary metal-oxide semiconductors (CMOS) is reaching its limit [1] in accordance with Moore’s prediction [2], introducing limitations and challenges to the semiconductor industry. Non-charge-based logic devices are one of the leading concepts [5] as these devices are power efficient and ultra-compact [6]. These devices can operate at high frequencies and offer new features such as non-volatility and low-voltage operation [5]. With the need for solutions beyond CMOS, the research and development of novel non-charge-based logic devices have seen a great deal of interest in the past decade [3,4].

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