Abstract

With devices entering the nanometer scale process-induced variations, intrinsic variations and reliability issues impose new challenges for the electronic design automation industry. Design automation tools must keep the pace of technology and keep predicting accurately and efficiently the high-level design metrics such as delay and power. Although it is the most time consuming, Monte Carlo is still the simplest and most employed technique for simulating the impact of process variability at circuit level. This work addresses the problem of efficient alternatives for Monte Carlo for modeling circuit characteristics under statistical variability. This work employs the error propagation technique and Response Surface Methodology for substituting Monte Carlo simulations for library characterization. The techniques are validated and compared using a production level cell library using a state-of-the-art 32 nm technology node and statistical device compact model. They require electrical simulation effort linear to the number of devices, thus from one to two orders of magnitude speed-up is obtained compared to Monte Carlo analysis with the error on standard deviation and mean being smaller than 2% for the Response Surface Methodology, as compared to errors of 7% when using linear sensitivity analysis.

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