Abstract

A fast and accurate technique for modelling and simulation of clock jitter in continuous-time sigma-delta (ΣΔ) modulators is introduced. In addition to its high speed compared to the traditional jitter simulation method, the proposed technique is still continuous-time based, which is more convenient than discrete-time based jitter modelling suggested in other publications. The mathematical principle of the proposed technique, as well as simulations results, are presented and compared to other simulation techniques.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call