Fast Algorithm and Hardware Architecture for Modular Inversion in GF(p)

Abstract

Modular inversion in the Galois field GF(p) is a part of the kernel arithmetic operations used by many public key cryptosystems, and its high-speed hardware design is necessary. A fast algorithm and its hardware architecture for modular inversion in GF(p) are proposed in this work. The algorithm reduces 30 percent iteration cycles compared with previous algorithms reported in the literature. The proposed hardware architecture contains only two adders performing computation parallel, and the synthesized results show that our hardware architecture is more resource-efficient and faster.