Abstract

The timing monitoring and control system is a key component for satellite navigation systems. Based on a current clock monitoring and control design, a composite clock concept for clock generation is introduced. In addition to the basic clock correction algorithms in a clock ensemble, also failure scenarios need to be detected and corrective action has to be implemented. With two alternative clock correction algorithms for the clock ensemble, the Kalman filter and the weighted average based NIST AT1 algorithm, this paper will focus on investigation of failure (phase jump, frequency jump and clock failure) detection algorithms and methods for failure correction. As the algorithms are intended to be implemented as part of a satellite payload, the complexity of the algorithms is limited by constraints like limited FPGA size and limited computing power. These constraints will be considered in the evaluation of the failure detection and correction methods.

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