Failure analysis methodology on center patch issue due to salicidation in wafer fab

Abstract

Failure Analysis (FA) consists of fault verification, isolation, defect tracing, characterization and physical (elemental) analysis. It helps wafer fab to understand the root causes of low yield cases, drive the yield improvement activities. Due to the complexity of modern Integrated Circuits (ICs), defects causing the failure need more effort, a variety of FA tools to be identified. In this case, a case of wafer center patch failure was studied. First of all, failure mode was identified through datalog study, which identified the majority of the center dies failed in leakage bin. The subsequent electrical fault isolation was performed by IV measurement and Thermal Induced Voltage Alteration (TIVA). The defect signal was found at unique structure for different failure dies, which was known to be poly resistor structure after layout study. After that, top-down physical analysis was then carried out using several FA techniques such as delayering, Scanning Electron Microscope (SEM) inspection, Passive Voltage Contrast (PVC), Atomic Force Probing (AFP), cross-sectional approach was also carried out using Focus Ion Beam (FIB) and Transmission Electron Microscope (TEM). In the end the defect was found to be unwanted salicadation at the side wall of the poly resistor, due to process-related issue. With the help of FA findings, Fab was beneficial in identifying the related process causing this faiure.