Factors determining forward voltage drop in the field-terminated diode (FTD)

Abstract

Recently, there has been a revival of interest in a device first introduced in the early sixties and called the "gridistor" and currently referred to as the "FTD." The FTD offers the promise of low forward drop of the SCR together with the higher switching speeds and freedom from <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">dV/dt</tex> and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">di/dt</tex> problems of the transistor. However, other than a great deal of speculation, relatively little is known about the internal operation of the FTD, an extremely complex device which has features of its behavior separately resembling the J-FET, the rectifier, and the thyristor. In this paper, the FTD structure in both its buried grid and planar forms will be analyzed using an exact numerical solution of the full set of semiconductor device equations in two dimensions. The focus of the analysis will be on gaining an understanding of the device operation in the forward-conduction mode and using this to generate a set of guidelines for optimum device design. The guidelines will be made under the important consideration of meeting a forward-blocking capability since the specification of the latter strongly influences the design.