Fabrication of stacked logic circuits for printed integrated circuits

Abstract

We have demonstrated NAND and NOR logic circuit operations of stacked-structure complementary thin-film transistors (TFTs) using 6,13-bis(triisopropylsilylethynyl)-pentacene (TIPS-pentacene) and soluble ZnO as active layers. Bottom-gate-type TIPS-pentacene TFTs, as p-channel transistors, were formed on n-channel ZnO TFTs with common gate electrodes. Solution-processed silicone-resin layers were used as gate dielectric and electrical interconnection layers between lower and upper TFTs. The stacked-structure integrated circuits have several advantages such as ease of active layer formation, compact device area per stage, and the short length of the interconnection compared with the planar configuration in a conventional logic circuit.