Abstract
Local SOI MOSFETs were fabricated in the designed area on a Si bulk substrate using the separation by bonding silicon islands (SBSI) method. We describe the key fabrication process technology and show the electrical characteristics. The SBSI method consists of three key technologies: epitaxial growth of SiGe having high germanium concentration, lateral selective etching of SiGe, and bonding of buried oxides (BOX) grown in the gap. Epitaxial growth of 30 nm-thick Si0.63Ge0.37 without crystalline defects was achieved by reducing the growth temperature to as low as 450 ºC. The Si/Si0.63Ge0.37 structure allowed lateral etching of Si0.63Ge0.37 with a length of 1 mm in 2 minutes and with negligible etching of Si in a solution of hydrofluoric acid and nitric acid. Fabricated MOSFETs showed excellent characteristics, which were comparable to those of SOI wafers, although a small gap still remained in the BOX.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
