Abstract

This paper discusses the fabrication of Si-PDMS low voltage capillary electrophoresis chip (CE chip). Arrayed-electrode which is used to apply low separation voltage is fabricated along the sidewalls of the separation channel on the silicon based bottom part. Isolation trenches, which are placed surrounding the arrayed-electrode, insure the insulation between the arrayed-electrode, as well as arrayed-electrode and liquid in the micro channel. Polydimethylsilicone (PDMS) is used as the cover. PDMS and silicon based bottom part are reversible sealed to attain Si-PDMS low voltage CE chip. Experiments have been done to obtain optimum electrophoresis separation condition: separation voltage is 45V, switch time is 2s and the Phe and Lys electrophoresis separation is successful.

Highlights

  • Lab on a Chip, or called Miniaturized Total Analysis System (μ-TAS [1]), which has features of miniature, fast, high performance and throughput, has become a hot research topic in analytical chemistry

  • This paper discusses the fabrication of Si-PDMS low voltage capillary electrophoresis chip (CE chip)

  • Low Voltage CE Chip Electrophoresis Separation Phe and Lys electrophoresis separation experiments are done in the optimal condition: separation voltage: 45V (300V/cm); switch time: 2s

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Summary

Introduction

Lab on a Chip, or called Miniaturized Total Analysis System (μ-TAS [1]), which has features of miniature, fast, high performance and throughput, has become a hot research topic in analytical chemistry. Capillary Electrophoresis Chip (CE chip) is a highly integrated miniature separation and analysis device within the development of biotechnology and MEMS (Micro-Electro-Mechanic Systems) technology. With the development of CE chip and widely applications, many fields such as disease diagnosis, environmentent monitoring, new drug development, food safety inspection will be changed thoroughly. Nowadays, it has already become one of the most important study subjects in chemistry, life science, MEMS, physics, micro-electronics and etc [3,4]. Using arrayed-electrode to apply low separation voltage section by section can obtain the demanded high separation electric field. The low voltage CE chip is obtained by reversible sealing the silicon based bottom part and the PDMS cover

Low Voltage Separation Principle
Layout Design
Silicon Based Bottom Part of Low Voltage CE Chip
Fabrication PDMS Cover
Bond and Package
Inspection of the Fabricated Structure
Low Voltage Electrophoresis Separation
Conclusions
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