Abstract
SUMMARYThis paper reports on the development of a fundamental process for a Pierce‐type nanocrystalline Si (nc‐Si) electron emitter array for massively parallel electron beam (EB) lithography based on active‐matrix operation using a large‐scale integrated circuit (LSI). The emitter array consists of 100 × 100 hemispherical emitters formed by isotropic wet etching of Si. EB resist patterning was demonstrated by 1:1 projection exposure using a discrete emitter array at CMOS‐compatible operating voltages. Isolation trenches filled with benzocyclobutene (BCB) were fabricated in the Si substrate for independent control of each emitter using the LSI. The integration process of the emitter array with LSI and an extraction electrode plate was also developed based on Au‐In and polymer bonding technologies.
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