Fabrication of cnfets with low-resistance electrical contacts

Abstract

Poor electrical contacts are obstacles for the application of carbon nanotube field-effect transistors (CNFETs) fabricated by lithography-based processes. One of the most influential factors is the resist residues existing at the metal-SWNT interface. However, the conventional resist removal approaches are not compatible to the SWNT-based fabrication process. Here we present an approach using an atomic layer deposition (ALD) of alumina to protect SWNTs from the image resists. As compared to other techniques, the ALD yields a uniform layer of Al2O3 on SiO2 and the alumina layer can be easily and completely removed from the SWNTs prior to metal evaporation. By utilizing such a protective layer, the cleanliness of the SWNTs is improved. Consequently, the distribution of on-resistances is narrowed and the mean value of the on-resistances is reduced to 38 KΩ from 52 KΩ for the CNFETs fabricated with and without the protective layer respectively. The simplicity of this approach makes it be easily integrated to other SWNT-based process flows.