Fabrication of Adiabatic Quantum-Flux-Parametron Integrated Circuits Using an Automatic Placement Tool Based on Genetic Algorithms

Abstract

Adiabatic quantum-flux-parametron (AQFP) logic is a kind of superconductor logic family that has higher energy efficiency compared to conventional rapid single-flux-quantum logic circuits. When compared to state-of-the-art CMOS technology, AQFP logic circuits have the advantage of relatively fast clock speeds (5-10 GHz) and five-six orders of magnitude reduction in energy, but it has some challenges. One problem is that the current design environment for AQFP integrated circuit design is insufficient, especially for large-scale circuits. Without a suitable design environment, the design of large AQFP integrated circuits is a very complicated process as it is time consuming and is prone to human error. To improve the design flow for large-scale AQFP logic circuits, we developed a tool that can efficiently place AQFP logic cells on a chip using evolutionary computation. We executed this program on three different benchmark circuits and confirm that the quality-of-results of the circuit placement becomes better. The wiring length can be reduced by up to 27.9%, which in turn reduces the number of Josephson junctions by 12.7%, from which they were originally used in inserted buffers for long-wire repeaters. To evaluate how well our tool can produce fabrication-ready designs, we designed and fabricated one of the benchmark circuits, namely a 4-bit shifter-rotator using our developed tool. We confirm partial operation.