Fabrication of a Silicon Nanowire Solar Cell on a Silicon-on-Insulator Substrate

Shinya Kato,Yasuyoshi Kurokawa,Tetsuo Soga,Kazuhiro Gotoh

doi:10.3390/app9050818

Shinya Kato, Yasuyoshi Kurokawa + Show 2 more

Open Access

https://doi.org/10.3390/app9050818

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Abstract

This study proposes metal-assisted chemical etching (MAE) as a facile method to fabricate silicon nanowire (SiNW) array structures, with high optical confinement for thin crystalline silicon solar cells. Conventional SiNW arrays are generally fabricated on Si wafer substrates. However, tests on conventional SiNW-based solar cells cannot determine whether the photo-current is derived from SiNWs or from the Si wafer. Herein, SiNW arrays were fabricated on a silicon-on-insulator substrate with a 10-μm-thick silicon layer for measuring the photocurrent of the SiNW only. The 9 μm-long p-type SiNW arrays were applied to a solar cell structure fabricated using an n-type H-doped amorphous Si layer, thereby confirming the photovoltaic effect. However, the device exhibited a conversion efficiency of 0.0017% because of a low short-circuit current (Jsc) and a low open-circuit voltage (Voc). The low Jsc resulted from a high series resistance and high absorption loss from the amorphous Si layer, whereas the low Voc resulted from the high surface recombination velocity of the SiNW array structure. Therefore, reducing the surface recombination of SiNW-based solar cells can improve their conversion efficiency.

Highlights

Crystalline silicon (c-Si) solar cells have a high conversion efficiency and low-fabrication cost [1,2,3,4].the efficiency of c-Si solar cells is limited by Auger recombination
These results reveal that reducing the surface recombination is vital for improving the efficiency of solar cells,9, fabricated using silicon nanowire (SiNW) array structures as the absorber layer
SiNW array structures were fabricated on p-type c-Si wafer substrates, using electroless Ag plating from solutions with various AgNO3 concentrations and metal-assisted chemical etching (MAE), over different etching times

Summary

Introduction

Crystalline silicon (c-Si) solar cells have a high conversion efficiency and low-fabrication cost [1,2,3,4]. The effects of the etching time of the MAE on the SiNW length, using standard p-type c-Si wafer substrates, were determined, and the morphology and optical properties of the resulting arrays were evaluated. After the SiNW fabrication process was optimised, a solar cell structure was fabricated by depositing an n-type H-doped amorphous Si (a-Si:H) layer onto a p-type SiNW array absorber layer, formed via MAE on the SOI substrate. The low V oc was caused by the high surface recombination velocity of the uncoated SiNW surfaces These results demonstrate that reducing surface recombination is vital for improving the efficiency of SiNW-based solar cells

Fabrication of SiNW Arrays

Solar Cell Fabrication

Evaluation

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Conclusions