Abstract
We have fabricated three dimensional photonic components such as waveguides and beam splitters from crystalline silicon using a process based on one or more ion irradiation steps with different energies and fluences, followed by electrochemical anodization and thermal annealing. We first demonstrate the fabrication of multilevel silicon waveguides and then extend this process to make multilevel beam splitters, in which three output waveguides are distributed over two depths. The dimensions of the waveguides can be defined within a range from 0.5 μm to several micrometers simply by varying the ion beam fluence.
Highlights
Several new technologies, e.g. 3D memories, many-core processors, are being developed to overcome present limitations of semiconductors and planar microelectronics. 3D layer architectures would reduce restrictions by avoiding physical crossings as well as reducing the traditional limitations of limited physical chip area. 3D multilevel photonics would provide engineers with a new dimension in which to work, enabling denser, more complex networks
We demonstrate a process for fabricating 3D photonic structures only using bulk, crystalline silicon with a single etching step
We have developed a micro- and nano-machining process in p-type crystalline silicon based on using high-energy ion beam irradiation with subsequent electrochemical anodization [11,12,13,14]
Summary
E.g. 3D memories, many-core processors, are being developed to overcome present limitations of semiconductors and planar microelectronics. 3D layer architectures would reduce restrictions by avoiding physical crossings as well as reducing the traditional limitations of limited physical chip area. 3D multilevel photonics would provide engineers with a new dimension in which to work, enabling denser, more complex networks. There is great interest in developing photonic optical interconnects to enhance the bandwidth and reduce power consumption in multi-core computing systems [2]. To achieve such vertically stacked, multilayer, 3D architectures, it may not be possible to use the traditional, optimized materials such as bulk, crystalline silicon. Using a wafer bonding approach [3, 4], devices are fabricated on two separate chips, the two aligned chips are attached. In previous work [10], we fabricated vertically-stacked waveguide couplers based on a SOI wafer. We demonstrate a process for fabricating 3D photonic structures only using bulk, crystalline silicon with a single etching step
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