Abstract

High Ge fraction Si/Si 1− x Ge x /Si heterostructures ( x=0.5) are processed into the super self-aligned ultrashallow junction electrode (S 3E) pMOSFETs. The ultrashallow junction is made from the selective epitaxial B-doped Si 0.5Ge 0.5 on source/drain grown by chemical vapor deposition (CVD) and subsequent thermal diffusion of B from B-Si 0.5Ge 0.5 into the substrate. The Ge fraction in the S 3EMOSFETs’ buried layer changes to 0.35 after the B diffusion at 750 °C due to the interdiffusion between Si and Ge. The B diffusion depth in Si/SiGe/Si is shallower compared to that in Si. Compared to Si-channel S 3EMOSFET, the maximum linear transconductance of the 0.12 μm gate Si 0.65Ge 0.35-channel S 3EMOSFET increases by approximately 45%. The threshold voltage shift and the S factor degradation in the short channel region are well suppressed compared to the Si-channel S 3EMOSFETs. It is suggested that the suppression of short channel effects is caused by the ultrashallow source/drain and the valence band discontinuity at the Si 1− x Ge x /buffer Si interface.

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